Features of Hidden Fault Detection in Pipeline Digital Components of Safety-Related Systems

Paper is devoted to a problem of the hidden faults, which are appropriate for safety-related instrumentation and control systems aimed at ensuring the safety of high-risk objects. Such systems are designed for operation in two modes: normal and emergency. The problem consists in accumulation (during a normal mode) of the hidden faults impairing the functionality of the digital components and system in an emergency mode. A model of activated path that determines the input data for simulation of pipelined digital component is offered. Simulation is executed to assess observability of the circuit points and to detect the potentially hazardous points, which are carriers of considered faults. The method of identifying potentially hazardous points in circuits with the LUT-oriented architecture in FPGA projects of digital components is proposed.